A circuit configuration of a conventional switching power supply apparatus is shown in FIG. 1. As shown in FIG. 1, a full-wave rectifier circuit RC1 rectifies an alternating input voltage of an alternating-current power source Vac that is input through a switch SW1, and a smoothing capacitor C1 smoothes the voltage rectified by the full-wave rectifier circuit RC1 to convert into a direct voltage. To both ends of the smoothing capacitor C1, a series circuit of a primary winding P1 (the number of windings n1) of a transformer T and a switching element Q7 having a FET is connected. A control unit 40 controls a switching operation of the switching element Q7 with the direct voltage from the smoothing capacitor C1. To both ends of a secondary winding S1 (the number of windings n2) of the transformer T, a series circuit of a diode D1 and a smoothing capacitor C3 is connected, and an output voltage of the smoothing capacitor C3 is supplied to a load not shown. A detector 43 detects an error voltage of the output voltage of the smoothing capacitor C3 from a reference voltage, and outputs the error voltage to a control circuit 44.
The control unit 40 will be explained in detail. To both ends of the smoothing capacitor C1, a series circuit of a FET Q1, a resistor R2, and a capacitor C2 is connected, and between a drain and a gate of the FET Q1, a resistor R1 is connected. Between a connection point between the resistor R2 and the capacitor C2, and a gate of the FET Q1, a FET Q2 is connected, and between a drain and a source of the FET Q2, a zener diode ZD1 is connected. Between the drain and a gate of the FET Q2, a resistor R4 is connected, between the gate of the FET Q2 and one end of the capacitor C2, a FET Q3 is connected, and to both ends of the capacitor C2, a series circuit of a resistor R3 and a FET Q4 is connected.
To both ends of the capacitor C2, a series circuit of a resistor R5 and a resistor R6, and a series circuit of a resistor R7 and a resistor R8 are connected. A comparator CP1 is a comparator having hysteresis characteristics in which a voltage divided by the resistor R5 and the resistor R6 is inputted to a positive terminal thereof, and a reference voltage Vr1 is inputted to a negative terminal thereof. When a voltage at the positive terminal is equal to or higher than a first threshold TH1, the output becomes at an H-level and the threshold is set to a second threshold TH2 that is lower than the first threshold TH1. When the voltage is equal to or lower than the second threshold TH2, the output becomes at an L-level and the threshold is reset to the first threshold TH1. The output of the comparator CP1 is output to a base of a transistor Q6 and the gate of the FET Q3.
In a comparator CP2, a voltage divided by the resistor R7 and the resistor R8 is inputted to a negative terminal thereof, a reference voltage Vr2 is input to a positive terminal thereof, the threshold is set to a third threshold TH3 that is lower than both the first threshold TH1 and the second threshold TH2. When a voltage at the negative terminal exceeds the third threshold TH3, the output becomes at the L-level, and when the voltage becomes equal to or lower than the third threshold TH3, the output becomes at the H-level. The output of the comparator CP2 is outputted to a latch circuit 41.
A resistor R9 is connected between the base and a collector of the transistor Q6, and a zener diode ZD2 is connected between the collector and an emitter of the transistor Q6. The emitter of the transistor Q6 is connected to a base of a transistor Q5, and a collector of the transistor Q5 is connected to the connection point between the resistor R2 and the capacitor C2. A resistor R10 is connected between a base and the collector of the transistor Q5, and an emitter of the transistor Q5 is connected to an oscillator 42 and the control circuit 44.
The latch circuit 41 is reset by an H-level signal outputted from the comparator CP2, and outputs an oscillation stop signal to the oscillator 42 for making the switching operation of the switching element Q7 inoperative, and maintains (set) the inoperative state of the switching element Q7, when an out-of-control detection signal indicating an abnormal condition is inputted from the control circuit 44. The output of the latch circuit 41 is outputted to the gate of the FET Q4. The control circuit 44 generates a control signal to turn on/off the switching element Q7 based on the error voltage from the detector 43, and output it to the oscillator 42. The oscillator 42 controls the switching operation of the switching element Q7 based on the control signal from the control circuit 44 and the signal from the latch circuit 41.
FIG. 2 shows a timing chart for explaining an operation of each component of the conventional switching power supply apparatus shown in FIG. 1. In FIG. 2, Vac represents a voltage of an alternating-current power source, VC1 represents a voltage of a smoothing capacitor C1, VLT represents an output of the latch circuit 41, VQ1 represents a voltage of the FET Q1, VQ4 represents a voltage of the FET Q4, VC2 represents a voltage of the capacitor C2, VCP1 represents an output of the comparator CP1, and VCP2 represents an output of the comparator CP2.
An operation of the switching power supply apparatus shown in FIG. 1 will be explained. First, when the switch SW1 is switched on, the alternating input voltage from the alternating-current power source Vac is rectified in the full-wave rectifier circuit RC1 and is smoothed by the smoothing capacitor C1 to be converted into a direct voltage. With this direct voltage, a constant current determined by a gate-source voltage Vgs, the zener diode ZD1, and the resistor R2 flows through the FET Q1, and the capacitor C2 is charged.
In the comparator CP1, when the voltage VC2 that is divided by the resistor R5 and the resistor R6 becomes equal to or higher than the first threshold TH1, the output VCP1 becomes at the H-level and the threshold is set to the second threshold TH2 that is lower than the first threshold TH1, and when the voltage VC2 becomes equal to or lower than the threshold TH2, the output VCP1 becomes at the L-level and the threshold is reset to the first threshold TH1. For the comparator CP2, the third threshold TH3 is set, and when the voltage VC2 exceeds the third threshold TH3, the output VCP2 becomes at the L-level, and when the voltage VC2 becomes equal to or lower than the third threshold TH3, the output VCP2 becomes at the H-level.
The capacitor C2 is not charged right after the switch SW1 is switched on, and a potential of negative terminal of the comparator CP2 is low. Therefore, the output of the comparator CP2 becomes at the H-level, and the latch circuit 41 is reset by the H-level output from the comparator CP2. Since a potential of the positive terminal of the comparator CP1 is also low, the output of the comparator CP1 becomes at the L-level. As a result, the transistor Q6 is turned on and the transistor Q5 is turned off, therefore, the direct voltage of the smoothing capacitor C1 is not supplied to the oscillator 42 and the control circuit 44. Thus, the switching element Q7 is in the inoperative state.
Subsequently, the capacitor C2 is gradually charged by the current flowing through the FET Q1, and when the voltage VC2 of the capacitor C2 exceeds the third threshold TH3 of the comparator CP2, the output VCP2 of the comparator CP2 becomes at the L-level, and the latch circuit 41 is turned into a state to receive a set signal.
Furthermore, the voltage VC2 of the capacitor C2 reaches the first threshold TH1 of the comparator CP1, the output VCP1 of the comparator CP1 becomes at the H-level. As a result, the FET Q3 is turned on, the FET Q2 is turned on, and the FET Q1 is turned off, therefore, the charge of the capacitor C2 is stopped. The transistor Q6 is turned off, and the transistor Q5 is turned on, therefore, the direct voltage from the capacitor C2 is supplied to the oscillator 42 and the control circuit 44 through the transistor Q5. Thus, the oscillator 42 and the control circuit 44 become operative, and by a signal from the oscillator 42, the switching element Q7 starts the switching operation. Time until the switching element Q7 starts the switching operation since the switch SW1 is switched on is the actuation time. The current flowing through the FET Q1 and the capacity of the capacitor C2 determine the actuation time.
Subsequently, when the switching element Q7 starts the switching operation, the energy is transmitted from a primary side to a secondary side through the transformer T, and a voltage generated in the secondary winding S1 of the transformer T is rectified and smoothed by the diode D1 and the smoothing capacitor C3 and a direct voltage is output. The control circuit 44 generates the control signal based on the error voltage from the detector 43, and controls the output voltage of the smoothing capacitor C3 to be a predetermined voltage by changing an on-width of the switching element Q7 by the control signal. Furthermore, an auxiliary power generated by a tertiary winding P2 and a diode D4 is supplied to the oscillator 42 and the control circuit 44 through the transistor Q5, to continue the switching operation of the switching element Q7.
Subsequently, when the switch SW1 is switched off, the voltage VC1 of the smoothing capacitor C1 starts decreasing. Therefore, the output voltage of the smoothing capacitor C3 cannot be controlled to be the predetermined voltage, the voltage of the auxiliary power by the tertiary winding P2 decreases, and the voltage VC2 of the capacitor C2 also decreases. When the voltage VC2 becomes the value of the second threshold TH2 of the comparator CP1, the output VCP1 of the comparator CP1 is inverted to be the L-level, the transistor Q6 is turned on, and the transistor Q5 is turned off, therefore, power supply to the oscillator 42 and the control circuit 44 is shut, thereby making the switching operation of the switching element Q7 inoperative. In addition, the FET Q3 is turned off, and the FET Q2 is turned on. Therefore, the FET Q1 is turned on, thereby starting the charge of the capacitor C2. However, since the voltage of the smoothing capacitor C1 is low, the capacitor C2 is not charged, and the control circuit 44 cannot resume the operation.
At time t1, if the output voltage of the smoothing capacitor C3 is in an abnormal condition such as an overvoltage, the detector 43 detects the abnormal condition such as an overvoltage, and outputs an abnormal condition detection signal to the control circuit 44. The control circuit 44 outputs the out-of-control detection signal based on the abnormal condition detection signal, to the latch circuit 41 to set the latch circuit 41. Therefore, the oscillation stop signal, which is the output VLT of the latch circuit 41, becomes at the H-level, and the oscillator 42 stops oscillation in response to the oscillation stop signal and the switching element Q7 stops the switching operation.
The FET Q4 is turned on by the output VLT from the latch circuit 41, and the electrical charge of the capacitor C2 is discharged through the resistor R3. Therefore, the voltage VC2 of the capacitor C2 decreases, and when reached the value of the second threshold TH2 of the comparator CP1 at time t2, the output VCP1 of the comparator CP1 is reversed to be the L-level. As a result, the transistor Q6 is turned on and the transistor Q5 is turned off, therefore, power supply to the oscillator 42 and the control circuit 44 is shut. Furthermore, the FET Q3 is turned off and the FET Q2 is turned off; therefore, the FET Q1 is turned on. Since the switch SW1 is not switched off, the smoothing capacitor C1 has a sufficient voltage, therefore, with the direct voltage of the smoothing capacitor C1, the capacitor C2 is charged. Since a charge current by the FET Q1 is set to be larger than a discharge current by the resistor R3, the voltage VC2 of the capacitor C2 starts to increase. When the voltage VC2 of the capacitor C2 reaches the value of the threshold TH1 at time t3, the FET Q3 is turned on and the FET Q2 is turned on, therefore, the FET Q1 is turned off and the charge of the capacitor C2 is stopped. As a result, for the capacitor C2, only the discharge by the resistor R3 is operated, and the voltage VC2 of the capacitor C2 starts decreasing. The voltage VC2 decreases to the value of the threshold TH2 at time t4, the capacitor C2 is charged as described previously. Since the switching operation of the switching element Q7 is stopped by stopping the oscillator 42 by the latch circuit 41 at this time, the auxiliary power by the tertiary winding P2 and the like becomes unavailable. However, by repeating the above operation, the capacitor C2 maintains a certain voltage, and each of the comparators CP1 and CP2, and the latch circuit 41, etc. continues operation thereof. In this state, the oscillator 42 is controlled by the latch circuit 41 to be inoperative, and power required when the latch circuit 41 is operating is small and is not required to be constantly supplied from the FET Q1. Consequently, a little power supplied by the FET Q1 by repeating ON/OFF is sufficient.
When the switch SW1 is switched off at time t6, the electrical charge of the smoothing capacitor C1 is discharged, upon turning on the FET Q1, through the FET Q1, the resistor R2, the resistor R3, and the FET Q4. Thus, the voltage VC1 of the smoothing capacitor C1 decreases. When the voltage VC1 of the smoothing capacitor C1 is sufficiently lowered to unable the FET Q1 to charge the capacitor C2, only the discharge of the capacitor C2 is executed (around time t9). When the output VC2 of the capacitor C2 becomes equal to or lower than the value of the third threshold TH3 at time t10, the output VCP2 of the comparator CP2 is inverted to the H-level, and by this H-level output, the latch circuit 41 is reset. In this state, the voltage of the smoothing capacitor C1 is sufficiently low, and the switching operation of the switching element Q7 cannot be resumed.
If an abnormal condition such as an overvoltage is detected by the output voltage of the smoothing capacitor C3 and the latch circuit 41 is set (time t1) as described, even if the switch SW1 is switched on again, a switching power cannot become operative during a reset time that is from switching off of the switch SW1 (time t6) until resetting of the latch circuit 41 (time t10). To restart the switching power, the smoothing capacitor C1 is required to be sufficiently discharged so that the latch circuit 41 is reset.
As described, in the conventional switching power supply device, when the latch circuit 41 is set, the power to maintain the operation of the latch circuit 41 is supplied by an actuation circuit, however, in a case where the purpose is different, reduction of discharge time of the smoothing capacitor C1 when the switch SW1 is switched off is not considered.
As a technique of speedily discharging the electrical charge of the smoothing capacitor C1, there is a method of speedily discharging a smoothing capacitor to quickly reset an inrush current limiting circuit, to shorten time for which the inrush current limiting circuit does not operate normally when the power supply switch is turned off and then turned on again, as disclosed in Japanese Patent Laid-Open Application No. H7-163142, and the details thereof are explained with reference to FIG. 3.
First, when a driving switch 2 is switched on, a primary side smoothing capacitor 16 is started to be charged by a rectified voltage from a full-wave rectifier diode bridge 4 through an inrush current limiting resistor 28, and a voltage is applied to a Vcc terminal of a switching control circuit 25. At this time, a zener diode 31 is energized, therefore, a transistor 33 remains to be off. Thus, a stop signal to switch off a switching element 17 is not provided to an OP terminal of the switching control circuit 25 since a photocoupler 34 is off. The voltage to the Vcc terminal of the switching control circuit 25 increases as the primary side smoothing capacitor 16 is charged, and when the voltage reaches a predetermined voltage (an actuation potential of the switching control circuit 25), the switching control circuit 25 is actuated and the switching element 17 starts the switching operation. A triac 15 is then turned on through a transformer 18, and a stable direct voltage is supplied to a load 30 by the transformer 18 through a rectifying and smoothing circuit 9 and 14. Since the charge voltage of the primary side smoothing capacitor 16 is higher than an operation voltage of diodes 38 and 39, a transistor 36 stays off.
If the driving switch 2 is switched off in this state, the transistor 33 is turned on. Thus, the photocoupler 34 is turned on, and the stop signal is provided to the OP terminal of the switching control circuit 25. As a result, the switching control circuit 25 is turned into a stopped state, and the switching element 17 stops the switching operation. In addition, the primary side smoothing capacitor 16 starts to discharge. When the application voltage of the primary side smoothing capacitor 16 decreases to a predetermined voltage, the zener diodes 38 and 39 become unenergized, and the transistor 36 is turned on. Therefore, the power voltage to the Vcc terminal of the switching control circuit 25 is lowered, and the primary side smoothing capacitor 16 is rapidly discharged through a resistor 27. When the power voltage at the Vcc terminal of the switching control circuit 25 decreases to a predetermined voltage Vb that is lower than an actuation voltage Va, the stopped state of the switching control circuit 25 is canceled. Thus, driving of the switching control circuit 25 becomes possible again.
In other words, when a detecting circuit that detects an input voltage having the zener diode 31, the resistor 32, the transistor 33, the photocoupler 34, and a resistor 35 detects an absence of input voltage signal, the switching control circuit 25 is stopped. The voltage of the primary side smoothing capacitor 16 is detected by the zener diodes 39 and 38, and when the detected voltage becomes equal to or lower than a predetermined voltage, the transistor 36 is turned on, to discharge the electrical charge of the primary side smoothing capacitor 16 by the resistor 27 and the transistor 36.